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DATA SHEET
MOS INTEGRATED CIRCUIT
PD16676
1/16, 1/32 DUTY LCD CONTROLLER/DRIVER
DESCRIPTION
PD16676 is a controller/driver containing RAMs capable of full-dot LCD displays. One of these IC chips can drive
the full-dot LCD up to 61-by-16 dots. These ICs are the most suitable for Kanji character or Chinese character pagers, as well as graphic pagers, displaying 16-by-16 dots per character.
FEATURES
* LCD driver with built-in display RAM * Dot display RAM: 2560 bits * Output: 61 segments & 16 commons * 8-bit parallel interface * Oscillation circuit incorporated
*
ORDERING INFORMATION
Part Number Package Chips Wafer 100-PIN PLASTIC QFP (14 x 20 mm)
PD16676P PD16676W PD16676GF-3BA
Remark
Purchasing the above products in terms of chips per wafer requires an exchange of other documents as well, including a memorandum of the product quality. Therefore, those who are interested in this regard are advised to contact an NEC salesperson for further details.
The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for availability and additional information.
Document No. S10561EJ5V0DS00 (5th edition) Date Published June 1999 NS CP(K) Printed in Japan
The mark * shows major revised points.
(c)
1996
PD16676
1. BLOCK DIAGRAM
SEG0 SEG60 COM0 COM15
Segment Driver
Common Driver 16
61
Common Counter
61-bit Latch Timing Generator
Line Address Decoder Line Preset Register & Counter RAM Read/Write Controller
Display Data RAM (2560 bits)
OSC1 Internal Oscillator OSC2
Column Address Decoder Column Address Counter & Register 8 8 8
8
8 DB0-DB7 A0 E(/RD) R,/W(/WR) Parallel Interface 8 VLC1 Command Decoder VLC2 VLC3 VLC4 /RESET VLC5 M,/S FR VDD VSS
Remark
/xxx indicates active low signals.
2
Data Sheet S10561EJ5V0DS00
PD16676
2. PIN CONFIGURATION (Pad Layout)
50 49 51 52 32 31 30 29
79 80 81 82 99 100
2 1
Data Sheet S10561EJ5V0DS00
3
PD16676
3. PIN CONNECTION
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 Pin Symbol COM5 COM6 COM7 COM8 COM9 COM10 COM11 COM12 COM13 COM14 COM15 SEG60 SEG59 SEG58 SEG57 SEG56 SEG55 SEG54 SEG53 SEG52 SEG51 SEG50 SEG49 SEG48 SEG47 SEG46 SEG45 SEG44 SEG43 SEG42 SEG41 SEG40 SEG39 SEG38 SEG37 SEG36 SEG35 SEG34 SEG33 SEG32 SEG31 SEG30 SEG29 SEG28 SEG27 SEG26 SEG25 SEG24 SEG23 SEG22 I/O Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Pin No. 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 Pin Symbol SEG21 SEG20 SEG19 SEG18 SEG17 SEG16 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 SEG3 SEG2 SEG1 SEG0 A0 OSC1 OSC2 E(/RD) R,/W(/WR) VSS DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 VDD /RESET FR VLC5 VLC3 VLC2 M,/S VLC4 VLC1 COM0 COM1 COM2 COM3 COM4 I/O Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Input Input Output Input Input -- Input/Output Input/Output Input/Output Input/Output Input/Output Input/Output Input/Output Input/Output -- Input Input/Output -- -- -- Input -- -- Output Output Output Output Output
4
Data Sheet S10561EJ5V0DS00
PD16676
4. PIN COORDINATES
Chip Size Pad Size Al Area Pad Size Open Area : : : 4.04 x 5.53 mm 120 x 120 m 108 x 108 m
Y (m) -2230 -2076 -1922 -1768 -1614 -1460 -1306 -1152 -998 -844 -690 -536 -382 -228 -74 80 234 388 542 696 850 1004 1158 1312 1466 1620 1774 1928 2082 2236 2517.2 2517.2 2517.2 2517.2 2517.2
2 2 2
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35
X (m) 1771 1771 1771 1771 1771 1771 1771 1771 1771 1771 1771 1771 1771 1771 1771 1771 1771 1771 1771 1771 1771 1771 1771 1771 1771 1771 1771 1771 1771 1771 1418.8 1268.8 1118.8 968.8 818.8
Pin No. 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70
X (m) 668.8 518.8 368.8 218.8 68.8 -81.2 -231.2 -381.2 -531.2 -681.2 -831.2 -981.2 -1131.2 -1281.2 -1431.2 -1771 -1771 -1771 -1771 -1771 -1771 -1771 -1771 -1771 -1771 -1771 -1771 -1771 -1771 -1771 -1771 -1771 -1771 -1771 -1771
Y (m) 2517.2 2517.2 2517.2 2517.2 2517.2 2517.2 2517.2 2517.2 2517.2 2517.2 2517.2 2517.2 2517.2 2517.2 2517.2 2242.8 2092.8 1942.8 1792.8 1642.8 1492.8 1342.8 1192.8 1042.8 892.8 742.8 592.8 442.8 292.8 142.8 -7.2 -157.2 -307.2 -457.2 -607.2
Pin No. 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100
X (m) -1771 -1771 -1767.8 -1767.8 -1767.8 -1767.8 -1767.8 -1767.8 -1767.8 -1767.8 -1745 -1595 -1395 -1245 -1045 -895 -682.6 -532.2 -382.2 -106.6 69.8 219.8 369.8 569.8 719.8 952.4 1102.4 1252.4 1402.4 1552.4
Y (m) -757.2 -907.2 -1149.4 -1299.4 -1489.4 -1639.4 -1839.4 -1989.4 -2139.4 -2289.4 -2513.4 -2513.4 -2513.4 -2513.4 -2513.4 -2513.4 -2513.4 -2513.4 -2513.4 -2513.4 -2513.4 -2513.4 -2513.4 -2513.4 -2513.4 -2513.4 -2513.4 -2513.4 -2513.4 -2513.4
Data Sheet S10561EJ5V0DS00
5
PD16676
5. PIN DESCRIPTIONS
5.1 Power System
Pin Symbol VDD VSS VLC1 to VLC5 Pin Name Power supply pin Ground Reference power supply for drivers Pin No. 87 78 90,91,92, 94,95 I/O -- -- -- Power supply Ground Reference power supply for LCD driving Function Description
5.2 Logic system
Pin Symbol M,/S Pin Name Master/Slave selection Pin No. 93 I/O Input Function Description Switches between the master chip and the slave chip. FR LCD to AC signal 89 Input/ Output Exchanges synchronizing signals (LCD-to-AC signals) in connecting cascades. This pin is for output if the chip is the master, and for input if the chip is the slave. DB0 to DB7 Data Bus 79 to 86 Input/ Output A0 Data/Instruction Switching 73 Input This pin is used for switching between the display data and the instruction. High level : Display data Low level : Instruction /RESET Reset and 68/80-series switching 88 Input This pin performs reset at the edge of the low-level pulse. At that level, it performs switching 68/80 series modes. High level : 68 series MPU interface Low level : 80 series MPU interface E(/RD) Enable and read enable 76 Input 68 series mode : Enable signal 80 series mode : Read enable signal R,/W(/WR) Read/Write and Write enable OSC1 Oscillation pin 74 Input 77 Input 68 series mode : Read/Write signal 80 series mode : Write enable signal Oscillation (connected with a register between OSC2) OSC2 Oscillation pin 75 Output Oscillation (connected with a register between OSC1) Data inputs/outputs
5.3 Driver System
Pin Symbol SEG0 to SEG60 COM0 to COM15 Common 96 to 100, 1 to 11 Output Common output pins If the chip is a slave, these pins correspond to COM16 to COM31. Segment Pin Name Pin No. 72 to 12 I/O Output Description Segment output pins
6
Data Sheet S10561EJ5V0DS00
PD16676
6. COMMANDS
Command 1 Display ON/OFF /RD /WR 1 0 A0 0 DB7 1 DB6 0 DB5 1 DB4 0 DB3 1 DB2 1 DB1 1 DB0 0/1 Function ON/OFF of the whole display is performed independent of the display RAM's data or internal state. 1: ON, 0: OFF (Power save at static drive ON)Note Determines the RAM line displayed on the uppermost line (COM0) of the display. Sets display RAM pages in the page address register. Sets display RAM's column address in the column address register. Reads status BUSY 1: During internal operation 0: READY status ADC 1: Clockwise output(Normal rotation) 0: Counterclockwise output (Reverse) ON/OFF 1: Display OFF, 0: Display ON RESET 1: Being reset, 0: Normal Displays the Accesses the data bus data display RAM of and writes it a pre-specified address. After onto the display RAM. access, the Reads the data column in the display address is RAM onto the incremented. data bus. This command is used to reverse the correspondence relationship between display RAM's column addresses and segment driver outputs. 0: Clockwise output (Normal rotation) 1: Counterclockwise output (Reverse) Selects between the normal display operation and the static all-lamp-driven display. 1: Static drive (Power save)Note 0: Normal display operation Selects between two different liquid-crystal cell driving duties. 1: 1/32 duty 0: 1/16 duty Increments the column address counter only when writing the display data; but not when reading it. Cancels read modify write mode Sets the display start line register to the first line. Sets the column address counter and the page address register to 0.
2
Display start line
1
0
0
1
1
0
Display start address (0 to 31) 1 1 0 Pages (0 to 3)
3 4
Page address set Column(segment) address set Status read
1 1
0 0
0 0
1 0
0
1
Column addresses (0 to 79) A D C O N / O F F R E S E T 0 0 0 0
5
0
1
0
B U S Y
6
Display data write
1
0
1
Write Data
7
Display data read
0
1
1
Read data
8
ADC select
1
0
0
1
0
1
0
0
0
0
0/1
9
Static drive ON/OFF
1
0
0
1
0
1
0
0
1
0
0/1
10 Duty select
1
0
0
1
0
1
0
1
0
0
0/1
11 Read modify write
1
0
0
1
1
1
0
0
0
0
0
12 END 13 Reset
1 1
0 0
0 0
1 1
1 1
1 1
0 0
1 0
1 0
1 1
0 0
Note If the static drive is turned ON in the display OFF state, the machine is placed in the power save state.
Data Sheet S10561EJ5V0DS00
7
PD16676
7. DISPLAY RAM MAP
Column Address 0 0
79
DB0
Page 0 (640 bits)
DB7
7 8
Page 1 (640 bits)
15 16
Page 2 (640 bits)
23 24
Page 3 (640 bits)
31 Line Address
8
Data Sheet S10561EJ5V0DS00
PD16676
* 8. Line Address Circuit
As is shown in Figure 8-1, the line address circuit specifies the line address that corresponds to a COM output for displaying the contents of display data RAM. The display start line address set command specifies line address of to the COM0 output. The screen can be scrolled by dynamically changing the line address via the display start line address set command. Figure 8-1. Specification of Display Start Line Address in Display Data RAM
Page Address Data DB1 DB0 DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7
Line Address 00H 01H 02H 03H 04H 05H 06H 07H 08H 09H 0AH 0BH 0CH 0DH 0EH 0FH 10H 11H 12H 13H 14H 15H 16H 17H 18H 19H 1AH 1BH 1CH 1DH 1EH 1FH
COM Output COM0 COM1 COM2 COM3 COM4 COM5 COM6 COM7 COM8 COM9 COM10 COM11 COM12 COM13 COM14 COM15 COM16 COM17 COM18 COM19 COM20 COM21 COM22 COM23 COM24 COM25 COM26 COM27 COM28 COM29 COM30 COM31
0
0
Page0
0
1
Page1
1
0
Page2
1
1
Page3
SEG60 13H 3CH
SEG58 15H 3AH
SEG59 14H 3BH
SEG0 4FH 00H
SEG1 4EH 01H
SEG2 4DH 02H
SEG3 4CH 03H
SEG4 4BH 04H
SEG5 4AH 05H
SEG6 49H 06H
SEG7 48H 07H
SEG53 1AH 35H
SEG54 19H 36H
SEG55 18H 37H
SEG56 17H 38H
SEG57 16H 39H
10 LCD DB0DB0 Out
Remark
COM16 to COM31 are valid in only 1/32 duty.
Column Address
ADC
Data Sheet S10561EJ5V0DS00
9
PD16676
* 9. ELECTRICAL SPECIFICATIONS
Absolute Maximum Ratings (TA = 25 C, VSS = 0 V)
Parameter Supply voltage Driver reference supply input voltage Driver reference supply input voltage Logic system input voltage Logic system output voltage Logic system input/output voltage Driver system output voltage Operating ambient temperature Storage temperature Symbol VDD VLC1 to VLC4 VLC5 VIN1 VOUT1 VI/O1 VOUT2 TA Tstg Rating -0.3 to +6.5 VDD-13 to VDD+0.3 VDD-13 to +0.3 -0.3 to VDD + 0.3 -0.3 to VDD + 0.3 -0.3 to VDD + 0.3 VLC5-0.3 to VDD + 0.3 -40 to +85 -65 to +150 Unit V V V V V V V C C
Cautions 1. If the absolute maximum rating of even one of the above parameters is exceeded even momentarily, the quality of the product may be degraded. Absolute maximum ratings, therefore, specify the values exceeding which the product may be physically damaged. Be sure to use the product within the range of the absolute maximum ratings. 2. Ensure that the phase relationship is VDD VLC1 VLC2 VLC3 VLC4 VLC5. Recommended Operating Range (VSS = 0 V)
Parameter Supply voltage Reference supply voltage Reference supply voltage Logic system input voltage Symbol VDD VLC1 to VLC4 VLC5 VIN1 MIN. 2.7 VDD-12 VDD-12 0 TYP. MAX. 5.5 VDD 0 VDD Unit V V V V
10
Data Sheet S10561EJ5V0DS00
PD16676
Electrical Characteristics (Unless otherwise specified, TA = -4 to +85 C, VDD = 2.7 to 5.5 V) -40
Parameter High-level input voltage High-level input voltage Low-level input voltage Low-level input voltage High-level input current Low-level input current High-level output voltage Symbol VIH1 VIH2 VIL1 VIL2 IIH IIL VOH1 Condition A0, DB0 to DB7, E, R,/W FR, M,/S, /RESET A0, DB0 to DB7, E, R,/W FR, M,/S, /RESET A0, E, R,/W, /RESET A0, E, R,/W, /RESET IOUT = -3 mA, DB0 to DB7, VDD = 4.5 to 5.5 V High-level output voltage High-level output voltage VOH2 VOH3 IOUT = -2 mA, FR, VDD = 4.5 to 5.5 V IOUT = -120 A, OSC2, VDD = 4.5 to 5.5 V Low-level output voltage VOL1 IOUT = 3 mA, DB0 to DB7, VDD = 4.5 to 5.5 V Low-level output voltage Low-level output voltage VOL2 VOL3 IOUT = 2 mA, FR, VDD = 4.5 to 5.5 V IOUT = 120 A, OSC2, VDD = 4.5 to 5.5 V High-level output voltage VOH1 IOUT = -1.5 mA, DB0 to DB7, VDD = 2.7 to 4.5 V High-level output voltage High-level output voltage VOH2 VOH3 IOUT = -1 mA, FR, VDD = 2.7 to 4.5 V IOUT = -80 A, OSC2, VDD = 2.7 to 4.5 V Low-level output voltage VOL1 IOUT = 1.5 mA, DB0 to DB7, VDD = 2.7 to 4.5 V Low-level output voltage Low-level output voltage VOL2 VOL3 IOUT = 1 mA, FR, VDD = 2.7 to 4.5 V IOUT = 80 A, OSC2, VDD = 2.7 to 4.5 V High-level leak current Low-level leak current Driver output ON resistor Driver output ON resistor Static current consumption Dynamic current consumption ILOH ILOL RON RON IDD0 IDD1 External clock: 18 kHz Self-oscillation: R = 1.3 M Dynamic current consumption Input capacitance Oscillator frequency IDD3 CIN fOSC During access: tCYC = 200 kHz TA = 25 C, f = 1 MHz In self-oscillation, VDD = 5.0 V, R = 1.3 M 2% Oscillator frequency fOSC In self-oscillation, VDD = 3.0 V, R = 1.3 M 2% Reset time tR /RESETInternal reset release 1.0 1000 11 16 21 kHz 15 18 DB0 to DB7, VIN/OUT = VDD DB0 to DB7, VIN/OUT = VSS TA = 25 C, VDD = 5 V, VLC5 = VSS TA = 25 C, VDD = 3.5 V, VLC5 = VSS 3 -3 7.5 50 1.0 15.0 30.0 500 8.0 21 0.2 VDD 0.2 VDD V V 0.2 VDD V 0.8 VDD 0.8 VDD V V 0.8 VDD V 0.2 VDD 0.2 VDD V V 0.2 VDD V 0.8 VDD 0.8 VDD V V 0.8 VDD MIN. 0.8 VDD 0.8 VDD 0.2 VDD 0.2 VDD
1
TYP.Note
MAX.
Unit V V V V
A A
V
-1
A A
k k
A A A A
pF kHz
s
Remark
The TYP. value is a reference value when TA = 25 C.
Data Sheet S10561EJ5V0DS00
11
PD16676
AC Characteristics 1 (Unless otherwise specified, TA = -40 to +85 C, VDD = 4.5 to 5.5 V) 80 Series MPU Read/Write Timing
Parameter Address hold time Address setup time System cycle time Control pulse width Data setup time Data hold time /RD access time Output disable time Symbol tAH8 tAW8 tCYC8 tCC tDS8 tDH8 tACC8 tOH8 DB0 to DB7 , CL = 100 pF 10 DB0 to DB7 /WR, /RD A0 Condition MIN. 10 20 1000 200 80 10 90 60 TYP. MAX. Unit ns ns ns ns ns ns ns ns
68 Series MPU Read/Write Timing
Parameter System cycle time Address setup time Address hold time Data setup time Data hold time Output disable time Access time Enable pulse width READ WRITE Symbol tCYC6 tAW6 tAH6 tDS6 tDH6 tOH6 tACC6 tEW E 100 80 DB0 to DB7, CL = 100 pF DB0 to DB7 A0, R,/W Condition MIN. 1000 20 10 80 10 10 60 90 TYP. MAX. Unit ns ns ns ns ns ns ns ns ns
12
Data Sheet S10561EJ5V0DS00
PD16676
AC Characteristics 2 (Unless otherwise specified, TA = -40 to +85 C, VDD = 2.7 to 4.5 V) 80 Series MPU Read/Write Timing
Parameter Address hold time Address setup time System cycle time Control pulse width Data setup time Data hold time /RD access time Output disable time Symbol tAH8 tAW8 tCYC8 tCC tDS8 tDH8 tACC8 tOH8 DB0 to DB7 , CL = 100 pF 20 DB0 to DB7 /WR, /RD A0 Condition MIN. 20 40 2000 400 160 20 180 120 TYP. MAX. Unit ns ns ns ns ns ns ns ns
68 Series MPU Read/Write Timing
Parameter System cycle time Address setup time Address hold time Data setup time Data hold time Output disable time Access time Enable pulse width READ WRITE Symbol tCYC6 tAW6 tAH6 tDS6 tDH6 tOH6 tACC6 tEW E 200 160 DB0 to DB7, CL = 100 pF DB0 to DB7 A0, R,/W Condition MIN. 2000 40 20 160 20 20 120 180 TYP. MAX. Unit ns ns ns ns ns ns ns ns ns
Data Sheet S10561EJ5V0DS00
13
PD16676
Test Point of Switching Characteristics
VIH Input VIL VOH Output VOL VOL VIL VOH VIH
Waveforms of Switching Characteristics 80 Series MPU Read/Write Timing
tAH8 A0 tAW8 /WR,/RD tDS8 DB0 - DB7 (WRITE) tACC8 DB0 - DB7 (READ) tOH8 tDH8 tCYC8 tCC
68 Series MPU Read/Write Timing
tCYC6 E tAW6 tEW
R,/W tAH6
A0 tDS6 DB0 - DB7 (READ) tACC6 DB0 - DB7 (READ) tOH6 tDH6
14
Data Sheet S10561EJ5V0DS00
PD16676
Reset
/RESET tR Internal Status Reset status
OSC
OSC 1/fOSC
Data Sheet S10561EJ5V0DS00
15
PD16676
* 10. Application Circuit Example
VDD M,/S FR OSC1
PD16676 Master Chip
61 SEG OSC2
16 COM
LCD
16 COM 61 SEG A0, /RESET, E,/RD, R,/W, /WR 4 M,/S GND
PD16676 Slave Chip
OSC1
8 DB0 - DB7
FR
16
Data Sheet S10561EJ5V0DS00
PD16676
* 11. PACKAGE DRAWING
100 PIN PLASTIC QFP (14x20)
A B
80 81
51 50
detail of lead end S CD R
Q
100 1 31 30
F G P H I
M
J
K M N S L S
NOTE Each lead centerline is located within 0.15 mm of its true position (T.P.) at maximum material condition.
ITEM A B C D F G H I J K L M N P Q R S
MILLIMETERS 23.20.2 20.00.2 14.00.2 17.20.2 0.8 0.6 0.320.08 0.15 0.65 (T.P.) 1.60.2 0.80.2 0.17 +0.08 -0.07 0.10 2.7 0.1250.075 55 2.8250.175 S100GF-65-3BA-4
Data Sheet S10561EJ5V0DS00
17
PD16676
* 12. RECOMMENDED SOLDERING CONDITIONS
Please consult with our sales offices for soldering conditions of the PD16676. Type of Surface Mount Device
PD16676GF-3BA : 100-PIN PLASTIC QFP (14 x 20 mm)
18
Data Sheet S10561EJ5V0DS00
PD16676
NOTES FOR CMOS DEVICES
1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS Note: Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. Environmental control must be adequate. When it is dry, humidifier should be used. It is recommended to avoid using insulators that easily build static electricity. Semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. All test and measurement tools including work bench and floor should be grounded. The operator should be grounded using wrist strap. Semiconductor devices must not be touched with bare hands. Similar precautions need to be taken for PW boards with semiconductor devices on it. 2 HANDLING OF UNUSED INPUT PINS FOR CMOS Note: No connection for CMOS device inputs can be cause of malfunction. If no connection is provided to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels of CMOS devices must be fixed high or low by using a pull-up or pull-down circuitry. Each unused pin should be connected to VDD or GND with a resistor, if it is considered to have a possibility of being an output pin. All handling related to the unused pins must be judged device by device and related specifications governing the devices. 3 STATUS BEFORE INITIALIZATION OF MOS DEVICES Note: Power-on does not necessarily define initial status of MOS device. Production process of MOS does not define the initial operation status of the device. Immediately after the power source is turned ON, the devices with reset function have not yet been initialized. Hence, power-on does not guarantee out-pin levels, I/O settings or contents of registers. Device is not initialized until the reset signal is received. Reset operation must be executed immediately after power-on for devices having reset function.
Data Sheet S10561EJ5V0DS00
19
PD16676
* The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. * No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document. * NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Corporation or others. * Descriptions of circuits, software, and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. The incorporation of these circuits, software, and information in the design of the customer's equipment shall be done under the full responsibility of the customer. NEC Corporation assumes no responsibility for any losses incurred by the customer or third parties arising from the use of these circuits, software, and information. * While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. * NEC devices are classified into the following three quality grades: "Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a customer designated "quality assurance program" for a specific application. The recommended applications of a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device before using it in a particular application. Standard: Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) Specific: Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books. If customers intend to use NEC devices for applications other than those specified for Standard quality grade, they should contact an NEC sales representative in advance.
M7 98. 8

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